Cognitive Neuromorphic systems are gaining increasing importance in an era where CMOS digital computing techniques are meeting hard physical limits. These silicon systems mimic extremely energy efficient neural computing structures, potentially both for solving engineering applications as well as understanding neural computation. Towards this end, we provide a glimpse at what the technology evolution roadmap looks like for these systems so that Neuromorphic engineers may gain the same benefit of anticipation and foresight that IC designers gained from Moore¹s law many years ago. Scaling of energy efficiency, performance, and size will be discussed as well as how the implementation and application space of Neuromorphic systems are expected to evolve over time. These approaches are fueled by recent advances in programmable and configurable large-scale analog circuits and systems enabling a typical factor of 1000 improvement in computational power (Energy) efficiency over their digital counterparts. We will overview a few examples in this area as helps the resulting roadmap discussion, including speech, vision, and sensor interfaces. These techniques are even more critical given the saturation of computational energy efficiency of digital multiply accumulate structures, the key component for high-performance computing.